In the related art, digital apparatuses, including mobile apparatuses, digital cameras, and digital video cameras, have been reduced in size, and semiconductor devices that allow for higher density packaging have been used for mounting components within a smaller space. As examples of such semiconductor devices, chip scale packages (CSPs) and ball grid array (BGA) packages have been widely used. Regarding CSPs and BGA packages, solder bumps serving as external connection terminals are formed at a lower surface of a package in place of lead terminals so that the mounting area can be reduced. By using such CSPs and BGA packages to reduce the area of a printed wiring board, the demands for size reduction of the aforementioned apparatuses can be met. In order to meet the demands for further size reduction of such apparatuses in recent years, there is a growing need for further reducing the size of CSPs and BGA packages. However, reducing the thickness of a CSP or a BGA package to meet the demands for size reduction of such apparatuses leads to reduced rigidity of the semiconductor device. This tends to increase the amount of warping of the CSP or the BGA package due to heating during a solder joining process in a reflow step.
Warping of the CSP or the BGA package causes a gap to form between terminal electrodes of the semiconductor device and board electrodes of the printed wiring board when the semiconductor device and the printed wiring board are joined to each other, causing defective solder joints to occur. If the connection terminals of the CSP or the BGA package are to be arranged at a narrow pitch, it is necessary to reduce the volume of the solder bumps to prevent the occurrence of bridging between the solder bumps. This results in reduced height of the solder bumps. Furthermore, in order to prevent the occurrence of bridging between the connection terminals arranged at a narrow pitch, it is also necessary to reduce the amount of solder paste, which is to serve as the board electrodes to be printed on the printed wiring board. As a result, the gap formed between the solder bumps and the solder paste printed on the printed wiring board becomes larger due to the warping of the CSP or the BGA package. This leads to a problem in that defective solder joints tend to occur readily.
As a countermeasure against this problem, PTL 1 discusses a method that reduces the occurrence of defective joints by gradually increasing the height of the solder bumps relative to the electrodes toward the periphery of the semiconductor device where the semiconductor device is warped by a great amount. In detail, PTL 1 proposes two methods, namely, a method in which the supply of solder bumps is uniform but the diameter of openings in a resist is reduced toward the periphery of an interposer substrate, and a method in which the supply of solder bumps is gradually increased toward the periphery of the interposer substrate.
However, with the aforementioned method in which the diameter of the openings in the resist is gradually reduced, the reduced diameter results in a reduced joint area between the solder bumps and the electrodes. This results in increased load due to a heating cycle occurring when the power of the semiconductor device is turned on and off. Moreover, even if the diameter of the openings in the resist is reduced, since the solder bumps formed on the electrodes of the interposer substrate are each formed by surface tension into a spherical shape that is larger in size than the diameter of the corresponding opening in the resist, it is difficult to ensure sufficient height for the solder bumps, resulting in a low effect for reducing the occurrence of defective solder joints between the solder bumps and the board electrodes. Specifically, with this method, because the solder joint area is small in sections where the warping amount of the interposer substrate is large, the solder joint strength is reduced, and the lifespan of the solder joints is shortened.
The lifespan of the solder joints of the solder bumps is evaluated on the basis of an accumulation of distortion occurring in the solder bumps due to a mismatch between linear coefficients of expansion of the semiconductor device and the printed wiring board. Therefore, since distortion tends to occur when the contact area of the solder joints is small, it is necessary to ensure sufficient height for the solder bumps by forming the solder bumps with a maximum possible contact area in order to extend the lifespan of the solder joints. Specifically, it is necessary to ensure flatness of the solder bumps by increasing the height of the solder bumps from the electrodes so as to compensate for the warping of the interposer substrate, so that the solder bumps can be reliably soldered to the printed wiring board. However, with the method of the related art in which the supply of solder is gradually increased, the amount of solder is simply increased where the warping amount is large. Therefore, when the terminals are arranged at a narrow pitch, bridging occurs between the solder bumps, which results in a problem of defective joints different from the aforementioned defective joints.